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MIC22950
10A Integrated Switch Synchronous Buck Regulator with Frequency Programmable to 2MHz
General Description
The Micrel MIC22950 is a high-efficiency 10A integrated switch, synchronous buck (step-down) regulator. The MIC22950 switching frequency is programmable from 400kHz to 2MHz, allowing the customer to optimize designing either for efficiency or for the smallest footprint. The MIC22950 achieves over 95% efficiency while still switching at 2MHz over a broad load range. The ultra-high-speed control loop keeps the output voltage within regulation, even under extreme transient load swings commonly found in FPGAs and low voltage ASICs. The output voltage can be adjusted down to 0.7V in order to address all low-voltage power needs. The MIC22950 features a full range of sequencing and tracking options. The EN/DLY and the DELAY pins, combined with the POR/PG pin, allow multiple outputs to be sequenced in several ways during turn-on and turn-off by using EN pin. The RC (Ramp ControlTM) pin allows the device to be connected to any another device in the MIC22x00 family of products, to keep the output voltages within a certain delta V during start-up. The MIC22950 is available in a 32-pin 5mm x 5mm MLF(R) with a junction operating range from -40C to +125C. Datasheet and supporting documentation can be found on Micrel's web site at: www.micrel.com.
Features
* * * * * * * * * * * * * * 2.6V to 5.5V supply voltage Fully-integrated MOSFET switches Adjustable output voltage option down to 0.7V Output load current up to 10A Full sequencing and tracking capability Power-On Reset Efficiency >95% across a broad load range Operating frequency programmable: 400kHz to 2MHz Ultra-fast transient response 100% maximum duty cycle Micropower shutdown Thermal-shutdown and current-limit protection Available in a 32-pin 5mm x 5mm MLF(R) package -40C to +125C junction temperature range
Applications
* * * * * High-power density point-of-load conversion Base stations, Servers and Routers Blu-ray players, DVD Recorders Computer Peripherals FPGAs, DSP, and low-voltage ASIC power
_________________________________________________________________________________________________________________________
Typical Application
Efficiency vs. Load Current
100 95 EFFICIENCY (%) 90 85 80 75 70 65 60 0 2 4 6 VIN = 5V VOUT = 3.3V TA = 25C 8 10
LOAD CURRENT (A)
MIC22950 10A Synchronous DC-DC Converter
Ramp Control is a trademark of Micrel, Inc MLF and MicroLeadFrame are registered trademarks of Amkor Technology, Inc.
Sequencing and Tracking
Micrel Inc. * 2180 Fortune Drive * San Jose, CA 95131 * USA * tel +1 (408) 944-0800 * fax + 1 (408) 474-1000 * http://www.micrel.com
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Ordering Information
Part Number MIC22950YML Nominal Output Voltage Adjustable Temperature Range -40 to +125C Package 32-Pin 5mm x 5mm MLF
(R)
Lead Finish Lead Free
Note: (R) MLF is a GREEN RoHS-compliant package. Lead finish is NiPdAu. Mold compound is Halogen Free.
Pin Configuration
32-Pin 5mm x 5mm MLF(R) (ML)
Pin Description
Pin Number 1,2,7,8,17,23,24 3 Pin Name PVIN EN/DLY Pin Function Power Supply Voltage (Input): Requires bypass capacitor to PGND. Enable/ delay (Input): This pin has a 1.24V band gap reference. When the pin is pulled higher that this the part will start up. Below this voltage the device is in its low quiescent current mode. The pin has a 1A current source pull-up to VIN. By adding a capacitor to this pin, a delay may be generated. The enable function will not operate with an input voltage lower than UVLO. Delay (Input): A capacitor sets the internal delay timer. Timer delays power-on reset (POR) at power-up and power-down. Ramp Control (Input): Capacitor-to-ground from this pin determines slew rate of output voltage during start-up. This can be used for tracking capability as well as soft start. RC pin cannot be left floating. Use a minimum capacitor value of 120pF or larger. Power-On-Reset (Output): Open-drain output device indicates when the output is out of regulation and is active after the delay set by the DELAY pin. Power Ground (Power): Power Ground. Switch (Output): Internal power MOSFET output switches. Signal Ground (Signal): Signal Ground. Frequency Set (Input): Adjustable Frequency with external capacitor. Feedback (Input): Input to the error amplifier, connect to the external resistor divider network to set the output voltage. Compensation pin (Input): Place a RC-to-SGND to compensate the device, see applications section. Signal Power Supply Voltage (Input): Requires bypass capacitor-to-SGND. Center Tab (Power): Must make a full connection to a GND plane for full output power to be realized.
4 5 6 9,10,15,16,25,26, 31,32 11,12,13,14,27, 28,29,30 18 19 20 21 22 EP
DELAY RC POR/PG PGND SW SGND CF FB COMP SVIN GND
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Absolute Maximum Ratings(1)
Supply Voltage (PVIN, SVIN).............................. -0.3V to +6V Output Switch Voltage (VSW) ........................... -0.3V to +6V Output Switch Current (ISW) ......................Internally Limited Logic Input Voltage (VEN, VPOR, VDLY)................. -0.3V to VIN Control Voltage (CF, RC, COMP, FB) .................... -0.3V to VIN Lead Temperature (soldering, 10sec.)....................... 260C Storage Temperature (Ts).........................-65C to +150C
Operating Ratings(2)
Supply Voltage (VIN)......................................... 2.6V to 5.5V Junction Temperature (TJ) ..................-40C TJ +125C Thermal Resistance MLF(R) (JC)..........................................................11C/W MLF(R) (JA)..........................................................30C/W
Electrical Characteristics(3)
TA = 25C with VIN = VEN = 3.3V; VOUT = 1.8V, unless otherwise specified. Bold values indicate -40C TJ +125C.
Parameter Supply Voltage Range VIN Turn On Voltage Threshold UVLO Hysteresis Quiescent Current (PWM Mode) Shutdown Current [Adjustable] Feedback Voltage FB pin input current Current Limit Output Voltage Line Regulation Output Voltage Load Regulation Maximum Duty Cycle Switch ON-Resistance PFET Switch ON-Resistance NFET Oscillator Frequency EN/DLY threshold voltage EN/DLY source current RC Pin IRAMP Power On Reset IPG(LEAK) VIN = 2.6 to VIN = 5.5V Ramp Control Current VPORH = 5.5V; POR = High Output Logic-Low Voltage (undervoltage condition), Power On Reset VPG(LO) Power On Reset VPG Over-temperature Shutdown Over-temperature Shutdown Hysteresis
Notes: 1. Exceeding the absolute maximum rating may damage the device. 2. The device is not guaranteed to function outside its operating rating. 3. Specification for packaged product only.
Condition
Min. 2.6
Typ.
Max. 5.5
Units V V mV mA A V nA A % % % m m
(VIN Rising) VEN = >1.34V; VFB = 1.1*VNOM (not switching) VEN = 0V 2% (over temperature) VFB = 0.9*VNOM VOUT 1.8V; VIN = 2.6 to 5.5V, ILOAD = 100mA 100mA < ILOAD < 10A, Vin = 3.3V VFB 0.5V ISW = 1000mA VFB=0.5V ISW = -1000mA VFB=0.9V CF = 390pF
2.35
2.5 260 1 5
2.6
2 10 0.714
0.686 1 10 16.5 0.2 0.2 100 11 8 325 1.14 0.6 0.6 510 1.24 1 1
21
610 1.34 1.8 1.8 1 2
kHz V A A A A mV %
IPOR = 5mA Hysteresis Threshold, % of VOUT below nominal 7.5
77 2 10 160 20 12.5
% C C
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Typical Characteristics
Shutdown Current vs. Input Voltage
7 SHUTDOWN CURRENT (A) 6 5 4 3 2 1 0 2 3 4 5 INPUT VOLTAGE (V) 6 INPUT CURRENT (A) 10
OPERATING CURRENT (mA)
Shutdown Current vs. Temperature
1.2 1 0.8 0.6 0.4 0.2 0
Operating Current (no SW) vs. Input Voltage
9 8 7 6 5 4 3 2 1 0 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120
TA = 25C
VIN = 3.3V
TA = 25C
2
3 4 5 INPUT VOLTAGE (V)
6
Input Current (no SW) vs. Temperature
0.9 REFERENCE VOLTAGE (V) 0.88 INPUT CURRENT (mA) 0.86 0.84 0.82 0.8 0.78 0.76 0.74 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 0.708 0.706 0.704 0.702 0.7 0.698 0.696 0.694 0.692 2
Reference Voltage vs. Input Voltage
0.708 REFERENCE VOLTAGE (V) 0.706 0.704 0.702 0.7 0.698 0.696 0.694 0.692 3 4 5 INPUT VOLTAGE (V) 6 -40 -20
Reference Voltage vs. Temperature
TA = 25C
0 20 40 60 80 100 120 TEMPERATURE (C)
Enable Threshold vs. Input Voltage
1.26 1.255 ENABLE VOLTAGE (V)
ENABLE VOLTAGE (V)
Enable Threshold vs. Temperature
1.26 1.255
650 600
Switching Frequency vs. Temperature
Enable (ON)
1.245 1.24 1.235 1.23 1.225 1.22 2.5 3 3.5 4 4.5 INPUT VOLTAGE (V) 5 5.5
1.245 1.24 1.235 1.23 1.225 1.22 -40 -20 0
Enable (ON)
FREQUENCY (kHz)
1.25
1.25
550 500 450 400 350 300 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120
TA = 25C
VIN = 3.3V
CF = 390pF
20
40
60
80 100 120
TEM PERATURE (C)
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Typical Characteristics (Continued)
Switching Frequency vs. Input Voltage
650 600 FREQUENCY (kHz) 550 500 450 400 350 300 2.5 3 3.5 4 4.5 INPUT VOLTAGE (V) 5 5.5
INPUT VOLTAGE (V) 2.8 2.7
Input Voltage UVLO vs. Temperature
18 16
RDSon vs. Temperature
RDSON (P-Channel)
VIN = (ON)
RDSon (m )
2.6 2.5 2.4 2.3 2.2 -40 -20 0 20 40 60 80 TEM PETATURE (C) 100 120
14 12 10 8 6 4 2 0 -40
CF = 390pF
VIN = (OFF)
RDSON (N-Channel)
-20
0 20 40 60 80 TEMPETATURE (C)
100 120
RDSon vs. Input Voltage
16 14 12 RDSon (m ) 10 8 6 4 2 0 2 3 4 5 INPUT VOLTAGE (V) 6 OUTPUT VOLTAGE (mV) 2000 1800
Output Voltage vs. RC Voltage
100 95 90 EFFICIENCY (%) 85 80 75 70 65 60
0 200 400 600 800 RC VOLTAGE (mV) 1000
Efficiency vs. Load Current (VOUT=1.2V)
VIN = 3.6V
RDSON (P-Channel)
1600 1400 1200 1000 800 600 400 200 0
VIN = 2.6V
RDSON (N-Channel)
VIN = 5V TCASE = 25C
TCASE = 25C
VOUT(NOM) = 1.8V
0
2
4 6 8 LOAD CURRENT (A)
10
100 95 90 EFFICIENCY (%) 85 80 75 70 65 60
Efficiency vs. Load Current (VOUT=1.8V)
100 95 EFFICIENCY (%)
Efficiency vs. Load Current (VOUT=3.3V)
VIN = 3.6V VIN = 2.6V VIN = 5V TCASE = 25C
90 85 80 75 70 65 60
VIN = 5V TCASE = 25C
0
2
4 6 8 LOAD CURRENT (A)
10
0
2
4 6 8 LOAD CURRENT (A)
10
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Bode Plots
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Functional Characteristics
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Functional Block Diagram
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MIC22950 FB The FB pin provides the control path to control the output. A resistor divider connecting the feedback to the output is used to adjust the desired output voltage. Refer to the feedback section in Applications Information of this data sheet for more detail. POR/PG This is an open drain output. A 47k resistor can be used for a pull-up to this pin. POR/PG is asserted high when output voltage reaches 90% of nominal set voltage and after the delay set by CDELAY. POR/PG is asserted low without delay when enable is set low or when the output goes below the -10% threshold. For a power-good (PG) function, the delay can be set to a minimum. This can be done by removing the DELAY pin capacitor. CF This pin allows the setting of the switching frequency. A 200A source current charges the capacitor on this pin up to a voltage of 1V. At this point, CF pin capacitor is then discharged with an internal N-Channel MOSFET marking the end of the switching period. The capacitor should be connected very close to the IC and grounded directly to the SGND pin. SW This is the connection to the source of the internal Pchannel MOSFET and drain of the N-Channel MOSFET. This is a high-frequency, high-power connection; therefore, traces should be kept as short and as wide as practical. SGND Internal signal ground for all low-power sections. PGND Internal ground connection to the source of the internal N-Channel MOSFETs.
Functional Description
PVIN, SVIN PVIN is the input supply to the internal 11m P-Channel Power MOSFET. This should be connected externally to the SVIN pin. The supply voltage range is from 2.6V to 5.5V. A 22F ceramic is recommended for bypassing each PVIN supply and 10F capacitor for SVIN pin. EN/DLY This pin is internally fed with a 1A current source to SVIN. A delayed turn on is implemented by adding a capacitor to this pin. The delay is proportional to the capacitor value. The internal circuits are held off until EN/DLY reaches the enable threshold of 1.24V. RC RC pin allows the slew rate of the output voltage to be programmed by the addition of a capacitor from RC pin to ground. RC pin is internally fed with a 1A current source and VOUT slew rate is proportional to the capacitor and the 1A source. The RC pin cannot be left floating. Use a minimum capacitor value of 120pF or longer. DELAY Adding a capacitor to this pin allows the delay of the POR signal. When VOUT reaches 90% of its nominal voltage, the DELAY pin current source (1A) starts to charge the external capacitor. At 1.24V, POR is asserted high. COMP The MIC22950 uses an internal-compensation network containing a fixed-frequency zero (phase-lead response) and pole (phase-lag response) which allows the external compensation network to be much simplified for stability. The addition of a single capacitor and resistor will add the necessary pole and zero for voltage-mode loop stability using low-value, low-ESR ceramic capacitors.
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MIC22950 equal or greater than the current limit of the MIC22950 to prevent overheating in a fault condition. For best electrical performance, the inductor should be placed very close to the SW nodes of the IC. For this reason, the heat of the inductor is somewhat coupled to the IC, which offers some level of protection if the inductor gets too hot. It is important to test all operating limits before settling on the final inductor choice. The size requirements refer to the area and height requirements that are necessary to fit a particular design. Please refer to the inductor dimensions on their datasheet. DC resistance is also important. While DCR is typically inversely proportional to size, DCR can represent a significant efficiency loss. Refer to the Efficiency Considerations section for a more detailed description. EN/DLY Capacitor EN/DLY sources 1A out of the IC to allow a start-up delay to be implemented. The delay time is simply the time it takes 1A to charge CEN/DLY to 1.24V. Therefore:
Application Information
The MIC22950 is a 10A synchronous stepdown regulator IC with a programmable 400kHz to 2MHz switching frequency. The control loop is a voltage-mode PWM control scheme. Other features include tracking and sequencing control for controlling multiple output power systems with POR/PG output.
Component Selection
Input Capacitor A minimum 22F ceramic capacitor (preferable) is recommended on each of the PVIN pins for bypassing. X5R or X7R dielectrics are recommended for the input capacitor. Do not use Y5V dielectrics, aside from losing most of their capacitance over temperature and voltage, they also become resistive at high frequencies. This reduces their ability to localize high-frequency noise. Output Capacitor The MIC22950 was designed specifically for the use of ceramic output capacitors. It is designed to work with 100F output capacitor. This output capacitor can be increased to improve transient performance. Since the MIC22950 is voltage mode control loop, it relies on the inductor and output capacitor for compensation. For this reason, do not use excessively large output capacitors. The output capacitor requires either an X7R or X5R dielectric. Do not use Y5V and Z5U dielectric capacitors, aside from the undesirable effect of their wide variation in capacitance over temperature, become resistive at high frequencies. Using Y5V or Z5U capacitors can cause instability in the MIC22950. Inductor Selection Inductor selection will be determined by the following (not necessarily in the order of importance): * * * * Inductance Rated current value Size requirements DC resistance (DCR)
TDLY =
1.24 x C EN/DLY 1 x 10 - 6
Efficiency Considerations Efficiency is defined as the amount of useful output power, divided by the amount of power consumed:
V xI Efficiency % = OUT OUT V xI IN IN x 100
The MIC22950 is designed for use with a 0.39H to 2.2H inductor. Maximum current ratings of the inductor are generally given in two methods: permissible DC current and saturation current. Permissible DC current can be rated either for a 40C temperature rise or a 10% loss in inductance. Ensure that the inductor selected can handle the maximum operating current. When the saturation current is specified, make sure that there is enough margin that the peak current will not saturate the inductor. The ripple can add as much as 2A to the output current level. The RMS rating should be chosen to be February 2010 10
Maintaining high efficiency serves two purposes. It reduces power dissipation in the power supply, reducing the need for heat sinks and thermal-design considerations and it reduces consumption of current for battery-powered applications. Reduced current draw from a battery increases the devices operating time, critical in hand held devices. There are mainly two loss terms in switching converters: Static losses and switching losses. Static losses are simply the power losses due to V.I or I2R. For example, power is dissipated in the high-side switch during the on cycle. Power loss is equal to the high-side MOSFET RDS(ON) multiplied by the RMS Switch Current squared (ISW2). During the off cycle, the low-side N-Channel MOSFET conducts, also dissipating power. Similarly, the inductor's DCR and capacitor's ESR also contribute to the I2R losses. Device operating current also reduces efficiency by the product of the quiescent (operating) current and the supply voltage. The current required to
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Micrel, Inc. drive the gates on and off at a constant 400kHz to 2MHz frequency and the switching transitions make up the switching losses. Figure 2 shows an efficiency curve. The non-shaded portion, from 0A to 1A, efficiency losses are dominated by quiescent current losses, gate drive and transition losses. In this case, lower supply voltages yield greater efficiency in that they require less current to drive the MOSFETs and have reduced input power consumption.
MIC22950 Efficiency loss due to DCR is minimal at light loads and gains significance as the load is increased. Inductor selection becomes a trade-off between efficiency and size in this case. Alternatively, under lighter loads, the ripple current due to the inductance becomes a significant factor. When light load efficiencies become more critical, a larger inductor value maybe desired. Larger inductances reduce the peak-to-peak inductor ripple current, which minimize losses. The following graph, in Figure 2, illustrates the effects of inductance value at light load.
Efficiency vs. Inductance
100 95 90 EFFICIENCY (%) 85 80 75 70 65 60
0 2 4 6 8 10
Efficiency vs. Load Current
100 95 90 EFFICIENCY (%) 85 80 75 70 65 60 LOAD CURRENT (A)
3.6V to 1.8V
L = 4.7H L = 1H
55 50 0 200 400 600 800 1000
Figure 1. Efficiency Curve
OUTPUT CURRENT (mA)
Figure 2. Efficiency vs. Inductance
The dashed region, 1A to 6A, efficiency loss is dominated by MOSFET RDS(ON) and inductor DC losses. Higher input supply voltages will increase the Gate-toSource voltage on the internal MOSFETs, thus reducing the internal RDS(ON). This improves efficiency by reducing DC losses in the device. All but the inductor losses are inherent to the device. In which case, inductor selection becomes increasingly critical in efficiency calculations. As the inductors are reduced in size, the DC resistance (DCR) can become quite significant. The DCR losses can be calculated as follows: LPD = IOUT2 x DCR From that, the loss in efficiency due to inductor resistance can be calculated as follows:
VOUT IOUT x 100
Efficiency Loss = 1 -
(VOUT IOUT ) + LPD
Compensation The MIC22950 has a combination of internal and external stability compensation to simplify the circuit for small, high efficiency designs. In such designs, voltage mode conversion is often the optimum solution. Voltage mode is achieved by creating an internal ramp signal which is derived from the CF current charging an external capacitor. This ramp is compared to the output of the error amplifier to modulate the pulse width of the switch node, maintaining output voltage regulation. With a typical gain bandwidth of 100 - 200kHz, the MIC22950 is capable of fast transient responses. The MIC22950 is designed to be stable with a typical application using a 1H inductor and a 100F ceramic (X5R) output capacitor. These values can be varied dependant upon the tradeoff between size, cost and efficiency, keeping the LC natural frequency 1 ( ) ideally less than FSW/17 to ensure 2 x x L x C stability can be achieved. The minimum recommended inductor value is 0.39H and minimum recommended output capacitor value is 10F.
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Micrel, Inc. The tradeoff between changing these values is that with a larger inductor, there is a reduced peak-to-peak current which yields a greater efficiency at lighter loads. A larger output capacitor will improve transient response by providing a larger hold up reservoir of energy to the output. The integration of one pole-zero pair within the control loop greatly simplifies compensation. The optimum values for CCOMP (in series with a 1k resistor) are shown below:
C L 0.39 - 0.47H 0.56 - 1.0H 1.2 - 2.2H
MIC22950 The MIC22950 provides switching frequency at 400kHz to 2MHz with synchronous internal MOSFETs. The internal MOSFETs include a high-side 11m P-Channel MOSFET from the input supply to the switch pin and an 8m N-Channel MOSFET from the switch pin-to-ground. Since the low-side N-Channel MOSFET provides the current during the off cycle, a freewheeling Schottky diode from the switch node-to-ground is not required. PWM control provides fixed-frequency operation. By maintaining a constant switching frequency, predictable fundamental and harmonic frequencies are achieved. Other methods of regulation, such as burst and skip modes, have frequency spectrums that change with load that can interfere with sensitive communication equipment. CF Pin Each switching cycle begins immediately following the discharge of the CF pin capacitor. From this point, a current source of 200A flows from CF pin into the external capacitor connected to the CF pin. This creates a linear voltage ramp rising towards a threshold voltage of 1V. When this capacitor reaches the 1V threshold, it triggers the end of the switching cycle by discharging CF pin to ground via an internal N-Channel; at which point, the next cycle begins. The actual switching frequency can be approximated by using the following equation which accounts for internal delays and capacitance:
FSW = 1
10-22F NA 10 -15pF* 10-22pF
47-100F 10*-20pF 22 -39pF 22-68pF
120-470F 25-47pF 56-100pF NA
VOUT > 1V; * VOUT > 1.4V; VOUT > 1.8V
Feedback The MIC22950 provides a feedback pin to adjust the output voltage to the desired level. This pin connects internally to an error amplifier. The error amplifier then compares the voltage at the feedback to the internal 0.7V reference voltage and adjusts the output voltage to maintain regulation. To calculate the resistor divider network for the desired output is as follows:
R2 = R1 VOUT - 1 V REF
(C + CPIN ) TDELAY + VRAMP CF ICF
Where VREF is 0.7V and VOUT is the desired output voltage. A 10k or lower resistor value from the output to the feedback is recommended since large feedback resistor values increase the impedance at the feedback pin, making the feedback node more susceptible to noise pick-up. A small decoupling capacitor (22pF - 100pF) across the lower resistor can reduce noise pickup by providing a low impedance path to ground. PWM Operation The MIC22950 is a voltage-mode, pulse-width modulation (PWM) controller. By controlling the ratio of on-to-off time, or duty cycle, a regulated DC output voltage is achieved. As load or supply voltage changes, so does the duty cycle to maintain a constant output voltage. In cases where the input supply runs into a dropout condition, the MIC22950 will run at 100% duty cycle.
Where: FSW = Switching Frequency TDELAY = CF pin Discharge time ~ 85ns VRAMP = Voltage ramp amplitude ~ 0.9V CCF = External CF capacitor = 68pF to 560pF CPIN = Internal Pin capacitance ~ 15pF ICF = CF current source = 200A
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Micrel, Inc. Alternatively, the Figure 3 can be used as a visual guide:
Switching Frequency vs. CF Capacitance
2250
SWITCHING FREQUENCY (kHz)
MIC22950 However, if EN pin is driven low, POR/PG will fall immediately to the low state and DELAY pin will begin to fall as the external capacitor is discharged by the 1A current sink. When the threshold of (VTP +1.24V)-1.24V is crossed (VTP is internal voltage clamp, VTP 0.9V), VOUT will begin to fall at a rate determined by the RC pin capacitor. As the voltage change in both cases is 1.24V, both rising and falling delays are matched at:
TPOR = 1.24 x C DELAY 1 x 10 - 6
2000 1750 1500 1250 1000 750 500 250 0 0 250 500 750 CF CAPACITANCE (pF) 1000
Figure 3. Switching Frequency vs. CF Capacitance
This pin should not be over-ridden using an external clock because the trigger pulses generated when the CF pin reaches 1V are utilized internally. Sequencing and Tracking The MIC22950 provides additional pins to provide up/down sequencing and tracking capability for connecting multiple voltage regulators together. EN/DLY Pin The EN/DLY pin contains a trimmed, 1A current source which can be used with a capacitor to implement a fixed desired delay in some sequenced power systems. The threshold level for power on is 1.24V with a hysteresis of 20mV. DELAY Pin The DELAY pin also has a 1A trimmed current source and a 1A current sink which acts with an external capacitor to delay the operation of the Power On Reset (POR/PG) output. This can be used also in sequencing outputs in a sequenced system, but with the addition of a conditional delay between supplies; allowing a first up, last down power sequence. After EN pin is driven high, VOUT will start to rise (rate determined by RC pin capacitor). As the FB pin voltage goes above 90% of its nominal set voltage, DELAY pin begins to rise as the 1A source charges the external capacitor. When the threshold of 1.24V is crossed, POR/PG is asserted high and DELAY continues to charge to a voltage SVIN. When FB falls below 90% of nominal, POR/PG is asserted low immediately.
RC Pin The RC pin provides a trimmed 1A current source/sink similar to the DELAY Pin for accurate ramp up (soft start) and ramp down control. This allows the MIC22950 to be used in systems requiring voltage tracking or ratiometric voltage tracking at startup. There are two ways of using the RC pin: 1. Externally driven from a voltage source 2. Externally attached capacitor sets output ramp up/down rate In the first case, driving RC pin with a voltage from 0V to VREF will program the output voltage between 0% and 100% of the nominal set voltage. In the second case, the external capacitor sets the ramp up and ramp down rate of the output voltage. The rate is 0.7 x C RC where TRAMP is the time given by TRAMP = 1 x 10 - 6 from 0% to 100% nominal output voltage. RC pin cannot be left floating. Use a minimum capacitor value of 120p for larger. Tracking and Sequencing Examples There are four distinct variations which are easily implemented using the MIC22950. The two Sequencing variations are Delayed and windowed. The two tracking variants are ratio Metric and Normal. The following diagrams illustrate methods for connecting two MIC22950's to achieve these requirements.
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MIC22950
Window Sequencing CRC1 = CRC2 = 0nF,CDELAY1 = 3.3nF, CDELAY2 = 0nF
Delayed Sequencing CRC1 = CRC2 = 0nF, CDELAY1 = 3.3nF, CDELAY2 = 6.8nF
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Micrel, Inc. Normal Tracking Ratio Metric Tracking
MIC22950
CCR1 = 3.3nF, CRC2 = 0nF, CDELAY1 = CDELAY2 = 3.3nF R1 = 1.1k, R2 = 698, R3 = 505, R4 = 698
CCR1 = 3.3nF, CRC2 = 0nF, CDELAY1 = CDELAY2 = 3.3nF R1 = 1.1k, R2 = 698, R3 = 505, R4 = 698
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Micrel, Inc. Current Limit The MIC22950 is protected against overload in two stages. The first is to limit the current in the P-Channel switch; the second is over- temperature shutdown. Current is limited by measuring the current through the high-side MOSFET during its power stroke and immediately switching off the driver when the preset limit is exceeded. The circuit in Figure 4 describes the operation of the current-limit circuit. Since the actual RDSON of the P-Channel MOSFET varies part-to-part, overtemperature and with input voltage, simple I.R voltage detection is not employed. Instead, a smaller copy of the Power MOSFET (Reference FET) is fed with a constant current which is a directly proportional to the factory set current limit. This sets the current limit as a current ratio and thus, is not dependant upon the RDSON value. Current limit is set to nominal value. Variations in the scale factor K between the Power PFET and the reference PFET used to generate the limit threshold account for a relatively small inaccuracy.
MIC22950 Where: PDISS is the power dissipated within the MLF(R) package and is typically 1.5W at 10A load. This has been calculated for a 1H inductor and details can be found in Table 1. RJA is a combination of junction-to-case thermal resistance (RJC) and case-to-ambient thermal resistance (RCA), since thermal resistance of the solder connection from the ePAD to the PCB is negligible; RCA is the thermal resistance of the ground plane to ambient. So RJA = RJC + RCA. TA is the Operating Ambient temperature.
VIN VOUT @ 10A 1 1.2 1.8 2.5 3.3 3 3.5 4 4.5 5
1.66 1.68 1.76 1.85 -
1.67 1.69 1.76 1.84 1.92
1.68 1.71 1.77 1.84 1.91
1.7 1.72 1.78 1.85 1.91
1.73 1.74 1.8 1.86 1.92
Table 1. Power Dissipation (W) for 10A Output
Example The Evaluation board has two copper planes contributing to an RJA of approximately 25oC/W. The worst case RJC of the MLF(R) is 11oC/W. If we look at a typical application of 3.6V to 1.8V @ 10A, the estimated Power dissipation in the MLF(R) package taken from Table 1 will be 1.76W:
Figure 4. Current Limit Detail
RJA = RJC + RCA RJA = 11 + 25 = 36oC/W To calculate the junction temperature for a 50oC ambient: TJ = TA+PDISS. RJA TJ = 50 + (1.76 x 36) TJ = 113oC This is below our maximum of 125oC.
Thermal Considerations The MIC22950 is packaged in the MLF(R) 5mm x 5mm, a package that has excellent thermal performance equaling that of the larger TSSOP packages. This maximizes heat transfer from the junction to the exposed pad (ePAD) which connects to the ground plane. The size of the ground plane attached to the exposed pad determines the overall thermal resistance from the junction to the ambient air surrounding the printed circuit board. The junction temperature for a given ambient temperature can be calculated using: TJ = TA + PDISS x RJA
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MIC22950
MIC22950 Schematic
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MIC22950
Bill of Materials
Item C1, C2, C3, C4 Part Number GRM21BR60J226ME39L C2012X5R0J226K 08056D226MAT2A GRM188R60J106ME47D C5 C1608X5R0J106K 06036D106MAT2A VJ0603Y390KXXMB C6 06033A390FAT2A C1608C0G1H390J VJ0603Y101KXAAT C7 06025A101KAT2A C1608C0G1H101J VJ0603Y391KXAAT C8 06035A391JAT2A C1608C0G1H391J GRM31CR60J476ME19L C9, C10 C11 C13 C14 C12 CIN L1 R1 R2 R3 R4 R5 Q1 U1
Notes: 1. 2. 3. 4. 5. 6. 7. 8. muRata: www.murata.com TDK: www.tdk.com AVX: www.avx.com Vishay: www.vishay.com Panasonic: www.panasonic.com Sumida: www.sumida.com Central Semiconductor: www.centralsemi.com Micrel, Inc.: www.micrel.com
Manufacturer muRata(1) TDK(2) AVX
(3)
Description Capacitor, 22F, 6.3V, X5R, 0805
Qty. 4
muRata TDK AVX Vitramon(4) AVX TDK Vitramon AVX TDK Vitramon AVX TDK muRata TDK AVX Vitramon Vitramon AVX TDK muRata Panasonic(5) Sumida
(6)
Capacitor, 10F, 6.3V, X5R 0603
1
Capacitor, 39pF, 25V, X7R, 0603
1
Ceramic Capacitor, 100pF, 50V, 0603
1
Ceramic Capacitor, 390pF, 50V, 0603
1
C3216X5R0J476M 12066D476MAT2A VJ0603Y102KXXMB VJ0603Y103KXXMB 06035A121JAT2A C1608COG1H121J GRM1885C1H121JA01D EEE-FPA122UAP CDEP105ME-1R2MC CRCW06031101FRT1 CRCW0603698RFRT1 CRCW06032002FRT1 CRCW06034752FRT1 CRCW06031003FRT1 2N7002E(SOT-23) CMDPM7002A MIC22950YML
Capacitor, 47F, 6.3V, 1206
2
Ceramic Capacitor, 1nf, 50V, 0603 Ceramic Capacitor, 10nf, 50V, 0603 Capacitor, 120pF, 50V, COG, 0603 1200uF, 10V, 10x10.2-Case 1.2H, 21A , Inductor Resistor, 1.1k, 1%, 0603 Resistor, 698, 1%, 0603 Resistor, 20k, 1%, 0603 Resistor, 47.5k 1%, 0603 Resistor, 100k 1%, 0603 Signal MOSFET-SOT-236 10A Integrated Switch Synchronous Buck Regulator with Frequency Programmable to 2MHz
2 1
1 1 1 1 1 1 1 1 1
Vishay Dale(4) Vishay Dale Vishay Dale Vishay Dale Vishay Dale Vishay Corp Central Semiconductor(7) Micrel8)
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MIC22950
PCB Layout Recommendation
Top Assembly
Middle Layer 1
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MIC22950
PCB Layout Recommendation (Continued)
Middle Layer 2
Top Layer
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MIC22950
Package Information
32-Pin 5mm x 5mm MLF(R) (ML)
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Recommended Land Pattern for 32-Pin 5mm x 5mm MLF(R)
Red circle indicates Thermal Via. Size should be 300 - 350mm in diameter, 1.00mm pitch, and it should be connected to GND plane for maximum thermal performance. Green rectangle (with shaded area) indicates Solder Stencil Opening on exposed pad area. Size should be 0.87 x 0.87mm in size, 1.07mm pitch.
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2009 Micrel, Incorporated.
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